27-29 November 2018
Asia/Tokyo timezone

Design and performance of MPPC-array readout system for the WAGASCI neutrino detector

27 Nov 2018, 18:00
2h

Speaker

Mr Kohei Matsushita (University of Tokyo)

Description

In order to reduce the uncertainties in the T2K long baseline neutrino oscillation experiment by improving the understanding of the neutrino-nucleus interaction at around 1 GeV, we have constructed the WAGASCI neutrino detector at J-PARC. The WAGASCI neutrino detector consists of an array of thin plastic scintillator strips, configured into a three-dimensional grid structure with gaps filled by water which serves as the neutrino interaction target. The light from scintillators is read out by MPPCs via wave length shifting fibers. The total number of MPPC channels is 1280 for a WAGASCI module.
In order to read out signals from MPPC arrays, a dedicated readout system has been developed. It is based on Silicon PM Integrated Read-Out Chip (SPIROC). SPIROC has been developed with the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels. SPIROC is on the front-end board named Active Sensor Unit (ASU) which is connected to a 32-channel arrayed MPPC. The readout signal from ASU are processed through an interface board (IF) and a detector interface (DIF) which controls SPIROC chips. Giga data concentrator card (GDCC) communicates with DAQ PC and the output data from DIF sent to DAQ PC via GDCC. To synchronize the DAQ system to the J-PARC neutrino beam, pre-beam trigger and beam trigger are sent to Clock Control Card. (CCC)
The design of the readout system and its performance will be presented.

Primary author

Mr Kohei Matsushita (University of Tokyo)

Presentation Materials

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