Silicon Photo Multiplier Design Using Silicon on Insulator Technology

27 Nov 2018, 18:00
2h

Speaker

Mr Akihiro Koyama (The University of Tokyo)

Description

A 6 × 6 silicon photomultiplier (SiPM) array aimed at one-to-one coupling to a finely separated scintillator array was fabricated and characterized. All SiPMs were formed in the bulk substrate layer of a silicon on insulator (SOI) wafer for enabling future SiPMs which consists of 3-D integrated electronics without mechanical bump bonding. Each channel had a size of 250 × 250 μm2 and was arranged for satisfying the counting-rate requirements of over 2 Mcps/mm2 in energy-resolvable X-ray photon counting computed tomography (PCCT). In this study, the basic performance of SOI-SiPM prototype was characterized. Several features, such as a fast recovery time around 16 ns and a gain of 1 × 105 were within requirements to realize Photon counting computed tomography.

Primary authors

Mr Akihiro Koyama (The University of Tokyo) Mr Ryutaro Hamasaki (The Graduate University for Advanced Studies) Prof. Kenji Shimazoe (The University of Tokyo) Prof. Hiroyuki Takahashi (The University of Tokyo) Prof. Tohru Takeshita (Shinshu University) Prof. Ikuo Kurachi (High Energy Accelerator Research Organization) Prof. Toshinobu Miyoshi (High Energy Accelerator Research Organization) Prof. Isamu Nakamura (High Energy Accelerator Research Organization) Prof. Shunji Kishimoto (High Energy Accelerator Research Organization) Prof. Yasuo Arai (High Energy Accelerator Research Organization)

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